{"product_id":"artificial-intelligence-hardware-design","title":"Artificial Intelligence Hardware Design","description":"\u003cb\u003eARTIFICIAL INTELLIGENCE HARDWARE DESIGN\u003c\/b\u003e \u003cp\u003e\u003cb\u003eLearn foundational and advanced topics in Neural Processing Unit design with real-world examples from leading voices in the field\u003c\/b\u003e \u003c\/p\u003e\u003cp\u003eIn \u003ci\u003eArtificial Intelligence Hardware Design: Challenges and Solutions\u003c\/i\u003e, distinguished researchers and authors Drs. Albert Chun Chen Liu and Oscar Ming Kin Law deliver a rigorous and practical treatment of the design applications of specific circuits and systems for accelerating neural network processing. Beginning with a discussion and explanation of neural networks and their developmental history, the book goes on to describe parallel architectures, streaming graphs for massive parallel computation, and convolution optimization. \u003c\/p\u003e\u003cp\u003eThe authors offer readers an illustration of in-memory computation through Georgia Tech’s Neurocube and Stanford’s Tetris accelerator using the Hybrid Memory Cube, as well as near-memory architecture through the embedded eDRAM of the Institute of Computing Technology, the Chinese Academy of Science, and other institutions. \u003c\/p\u003e\u003cp\u003eReaders will also find a discussion of 3D neural processing techniques to support multiple layer neural networks, as well as information like: \u003c\/p\u003e\u003cul\u003e\n\u003cli\u003eA thorough introduction to neural networks and neural network development history, as well as Convolutional Neural Network (CNN) models\u003c\/li\u003e \u003cli\u003eExplorations of various parallel architectures, including the Intel CPU, Nvidia GPU, Google TPU, and Microsoft NPU, emphasizing hardware and software integration for performance improvement\u003c\/li\u003e \u003cli\u003eDiscussions of streaming graph for massive parallel computation with the Blaize GSP and Graphcore IPU\u003c\/li\u003e \u003cli\u003eAn examination of how to optimize convolution with UCLA Deep Convolutional Neural Network accelerator filter decomposition\u003c\/li\u003e\n\u003c\/ul\u003e \u003cp\u003ePerfect for hardware and software engineers and firmware developers, \u003ci\u003eArtificial Intelligence Hardware Design\u003c\/i\u003e is an indispensable resource for anyone working with Neural Processing Units in either a hardware or software capacity.\u003c\/p\u003e","brand":"MediaPlace","offers":[{"title":"Default Title","offer_id":57310062379390,"sku":"NW9781119810452","price":74.82,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0817\/1379\/1261\/files\/9781119810452.jpg?v=1778581123","url":"https:\/\/mediaplace.com\/products\/artificial-intelligence-hardware-design","provider":"MediaPlace","version":"1.0","type":"link"}